pi74fct16500/162500t 18-bit registered transceivers 1 ps2077a 01/15/95 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 product description: pericom semiconductor?s pi74fct series of logic circuits are pro- duced in the company?s advanced 0.8 micron cmos technology, achieving industry leading speed grades. the pi74fct16500t and pi74fct162500t are 18-bit registered bus transceivers designed with d-type latches and flip-flops to allow data flow in transparent, latched, and clocked modes. the output enable (oeab and oeba), latch enable (leab and leba) and clock (clkab and clkba) inputs control the data flow in each direction. when leab is high, the device operates in transparent mode for a-to-b data flow. when leab is low, the a data is latched if clkab is held at a high or low logic level. the a bus data is stored in the latch/flip-flop on the high-to-low transition of clkab, if leab is low. oeab performs the output enable function on the b port. data flow from b port to a port is similar using oeba, leba and clkba. these high-speed, low power devices offer a flow-through organization for ease of board layout. the pi74fct16500t output buffers are designed with a power-off disable allowing ?live insertion? of boards when used as backplane drivers. the pi74fct162500t has 24 ma balanced output drivers. it is designed with current limiting resistors at its outputs to control the output edge rate resulting in lower ground bounce and undershoot. this eliminates the need for external terminating resistors for most interface applications. 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74fct16500t pi74fct162500t fast cmos 18-bit registered transceivers logic block diagram product features: common features:5 ? pi74fct16500t and pi74fct162500t are high-speed, low power devices with high current drive. ?v cc = 5v 10% ? hysteresis on all inputs ? packages available: ? 56-pin 240 mil wide plastic tssop (a) ? 56-pin 300 mil wide plastic ssop (v) pi74fct16500t features: ? high output drive: i oh = ?32 ma; i ol = 64 ma ? power off disable outputs permit ?live insertion? ? typical v olp (output ground bounce) < 1.0v at v cc = 5v, t a = 25c pi74fct162500t features: ? balanced output drivers: 24 ma ? reduced system switching noise ? typical v olp (output ground bounce) < 0.6v at v cc = 5v, t a = 25c leab clkab oeba leba clkba oeab d c d c a 1 d c d c b 1 to 17 other channels
pi74fct16500/162500t 18-bit registered transceivers 2 ps2077a 01/15/95 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 product pin description pin name description oeab a-to-b output enable input oeba b-to-a output enable input (active low) leab a-to-b latch enable input leba b-to-a latch enable input clkab a-to-b clock input (active low) clkba b-to-a clock input (active low) ax a-to-b data inputs or b-to-a 3-state outputs bx b-to-a data inputs or a-to-b 3-state outputs gnd ground v cc power inputs outputs oeab leab clkab ax bx lxxx z hhxl l hhxh h hl ll hl hh hlhx b (2) hllx b (3) truth table (1,4) notes: 1. a-tob data flow is shown. b-to-a data flow is similar but uses oeba, leba, and clkba. 2. output level before the indicated steady-state input condi- tions were established. 3. output level before the indicated steady-state input condi- tions were established, provided that clkab was low before leab went low. 4. h = high voltage level l = low voltage level z = high impedance = high-to-low transition product pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 25 26 27 28 32 31 30 29 oeab leab a 0 gnd a 1 a 2 vcc a 3 a 4 a 5 gnd a 6 a 7 a 8 a 9 a 10 a 11 gnd a 12 a 13 a 14 v cc a 15 a 16 gnd a 17 oeba leba gnd clkab b 0 gnd b 1 b 2 vcc b 3 b 4 b 5 gnd b 6 b 7 b 8 b 9 b 10 b 11 gnd b 12 b 13 b 14 v cc b 15 b 16 gnd b 17 clkba gnd 56-pin v56 a56
pi74fct16500/162500t 18-bit registered transceivers 3 ps2077a 01/15/95 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 dc electrical characteristics (over the operating range, t a = ?40c to +85c, v cc = 5.0v 10%) parameters description test conditions (1) min. typ (2) max. units v ih input high voltage guaranteed logic high level 2.0 v v il input low voltage guaranteed logic low level 0.8 v i ih input high current v cc = max. v in = v cc 1a i il input low current v cc = max. v in = gnd ?1 a i ozh high impedance v cc = max. v out = 2.7v 1 a i ozl output current v cc = max. v out = 0.5v ?1 a v ik clamp diode voltage v cc = min., i in = ?18 ma ?0.7 ?1.2 v i os short circuit current v cc = max. (3) , v out = gnd ?80 ?140 ?200 ma i o output drive current v cc = max. (3) , v out = 2.5v ?50 ?180 ma v h input hysteresis 100 mv pi74fct16500t output drive characteristics (over the operating range) parameters description test conditions (1) min. typ (2) max. units v oh output high voltage v cc = min., v in = v ih or v il i oh = ?3.0 ma 2.5 3.5 v i oh = ?15.0 ma 2.4 3.5 i oh = ?32.0 ma 2.0 3.0 v ol output low voltage v cc = min., v in = v ih or v il i ol = 64 ma 0.2 0.55 v i off power down disable v cc = 0v, v in or v out 4.5v ? ? 100 a pi74fct162500t output drive characteristics (over the operating range) parameters description test conditions (1) min. typ (2) max. units v oh output high voltage v cc = min., v in = v ih or v il i oh = ?24.0 ma 2.4 3.3 v v ol output low voltage v cc = min., v in = v ih or v il i ol = 24 ma 0.3 0.55 v i odl output low current v cc = 5v, v in = v ih or v il , v out = 1.5v (3) 60 115 150 ma i odh output high current v cc = 5v, v in = v ih or v il , v out = 1.5v (3) ?60 ?115 ?150 ma notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device type. 2. typical values are at vcc = 5.0v, +25c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. this parameter is determined by device characterization but is not production tested. capacitance (t a = 25c, f = 1 mhz) parameters (4) description test conditions typ max. units c in input capacitance v in = 0v 4.5 6 pf c out output capacitance v out = 0v 5.5 8 pf maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.) storage temperature .................................................................... ?65c to +150c ambient temperature with power applied .................................... ?40c to +85c supply voltage to ground potential (inputs & vcc only) .............. ?0.5v to +7.0v supply voltage to ground potential (outputs & d/o only) ........... ?0.5v to +7.0v dc input voltage ............................................................................ ?0.5v to +7.0v dc output current ..................................................................................... 120 ma power dissipation .......................................................................................... 1.0w note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability.
pi74fct16500/162500t 18-bit registered transceivers 4 ps2077a 01/15/95 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 power supply characteristics parameters description test conditions (1) min. typ (2) max. units i cc quiescent power v cc = max. v in = gnd or v cc 0.1 500 a supply current d i cc supply current per v cc = max. v in = 3.4v (3) 0.5 1.5 ma input @ ttl high i ccd supply current per v cc = max., outputs open v in = v cc 75 120 a/ input per mhz (4) oeab = oeba = v cc or gnd v in = gnd mhz one bit toggling 50% duty cycle i c total power supply v cc = max., v in = v cc 0.8 2.7 (5) ma current (6) outputs open v in = gnd f cp = 10 mh z (clkab) 50% duty cycle oeab = oeba = v cc leab = gnd v in = 3.4v 1.3 4.2 (5) one bit toggling v in = gnd f i = 5 mh z 50% duty cycle v cc = max., output open v in = v cc 3.8 7.5 (5) f cp = 10 mh z (clkab) v in = gnd 50% duty cycle oeab = oeba = v cc leab = gnd v in = 3.4v 8.6 21.85 (5) eighteen bits toggling v in = gnd f i = 2.5 mh z 50% duty cycle notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device. 2. typical values are at vcc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v); all other inputs at vcc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the icc formula. these limits are guaranteed but not tested. 6. i c =i quiescent + i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f cp /2 + f i n i ) i cc = quiescent current d i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) f i = input frequency n i = number of inputs at f i all currents are in milliamps and all frequencies are in megahertz.
pi74fct16500/162500t 18-bit registered transceivers 5 ps2077a 01/15/95 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 notes: 1. see test circuit and wave forms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this parameter is guaranteed but not production tested. 4. skew between any two outputs, of the same package, switching in the same direction. this parameter is guaranteed by design. 16500at 16500ct 16500dt com. com. com. parameters description conditions (1) min max min max min max unit t max clkab or clkba frequency c l = 50 pf ? 150 ? 150 ? 150 mhz t plh propagation delay r l = 500 w 1.5 5.1 1.5 4.6 1.5 4.1 ns t phl a x to b x or a x to b x t plh propagation delay 1.5 5.6 1.5 5.3 1.5 4.6 ns t phl leba to a x , leab to b x t plh propagation delay 1.5 5.6 1.5 5.3 1.5 4.6 ns t phl clkba to a x , clkab to b x t pzh output enable time 1.5 6.0 1.5 5.6 1.5 5.0 ns t pzl oeba to a x , oeab to b x t phz output disable time (3) 1.5 5.6 1.5 5.2 1.5 4.8 ns t plz oeba to a x , oeab to b x t su setup time high or low 3.0 ? 3.0 ? 3.0 ? ns ax to clkab, bx to clkba t h hold time high or low 0 ? 0 ? 0 ? ns ax to clkab, bx to clkba t su setup time clock high 3.0 ? 3.0 ? 3.0 ? ns high or low ax to leab, clock low 1.5 ? 1.5 ? 1.5 ? ns bx to leba t h hold time high or low 1.5 ? 1.5 ? 1.5 ? ns ax to leab, bx to leba t w leab or leba pulse width 3.0 ? 3.0 ? 3.0 ? ns high (3) t w clkab or clkba pulse width 3.0 ? 3.0 ? 3.0 ? ns high (3) or low pi74fct16500t switching characteristics over operating range
pi74fct16500/162500t 18-bit registered transceivers 6 ps2077a 01/15/95 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 notes: 1. see test circuit and wave forms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this parameter is guaranteed but not production tested. 4. skew between any two outputs, of the same package, switching in the same direction. this parameter is guaranteed by design. 162500at 162500ct 162500dt com. com. com. parameters description conditions (1) min max min max min max unit t max clkab or clkba frequency c l = 50 pf ? 150 ? 150 ? 150 mhz t plh propagation delay r l = 500 w 1.5 5.1 1.5 4.6 1.5 4.1 ns t phl a x to b x or a x to b x t plh propagation delay 1.5 5.6 1.5 5.3 1.5 4.6 ns t phl leba to a x , leab to b x t plh propagation delay 1.5 5.6 1.5 5.3 1.5 4.6 ns t phl clkba to a x , clkab to b x t pzh output enable time 1.5 6.0 1.5 5.6 1.5 5.0 ns t pzl oeba to a x , oeab to b x t phz output disable time (3) 1.5 5.6 1.5 5.2 1.5 4.8 ns t plz oeba to a x , oeab to b x t su setup time high or low 3.0 ? 3.0 ? 3.0 ? ns ax to clkab, bx to clkba t h hold time high or low 0 ? 0 ? 0 ? ns ax to clkab, bx to clkba t su setup time clock high 3.0 ? 3.0 ? 3.0 ? ns high or low ax to leab, clock low 1.5 ? 1.5 ? 1.5 ? ns bx to leba t h hold time high or low 1.5 ? 1.5 ? 1.5 ? ns ax to leab, bx to leba t w leab or leba pulse width 3.0 ? 3.0 ? 3.0 ? ns high (3) t w clkab or clkba pulse width 3.0 ? 3.0 ? 3.0 ? ns high (3) or low t sk ( o ) output skew (4) ? 0.5 ? 0.5 ? 0.5 ns pi74fct162500t switching characteristics over operating range pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com
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